\section{Introduction}
\label{introduction}
The task was to interconnect the supplied ALU and memories so that the system could support a small subset of the MIPS instruction set, namely conditional branch, jump, load, store, LDI and the rest of the ALU-instructions already implemented in the architecture (ADD, SUB, SLT, AND, OR). Communication between the surrounding system and the system being implemented was done through the use of two memory-blocks (instruction and data). This was done by reading instructions from the instruction memory, performing the required actions and then writing the result back to the data memory.\\

All code has been written in VHDL and compiled using ISE Project Navigator. ModelSIM was used to simulate the propagation of signals through the processor, and Xilinx Platform Studio was used to integrate the processor with the microblaze architecture.\\